From Altera Wiki

 

This page is a summary of all designs using Altera's Memory IP that are published on this wiki. The page is split into two main categories listing all designs by Altera FPGA device family and then targeted memory type. 

Contents 1 Designs by FPGA Family 1.1 Stratix V 1.2 Stratix IV 1.3 Stratix III 1.4 Stratix / Stratix II 1.5 Arria II 1.6 Arria I 1.7 Cyclone IV 1.8 Cyclone III 1.9 Cyclone / Cyclone II 2 Designs by Memory Type 2.1 DDR3 2.2 DDR2 2.3 DDR 2.4 QDR / QDRII / QDRII+ 2.5 RLDRAM / RLDRAMII 3 See Also 4 External Links 5 Key Words

Designs by FPGA Family

Stratix V

• Design Example : Multiple Memory interface Using Uniphy Quartus II v11.1 ; SV UniPHY,DDR3 450MHz, Quartus 11.1
• Design Example : Multiple Memory interface Using Uniphy ; SV UniPHY,DDR3 450MHz, Quartus 11.0
  

Stratix IV

• Design Example - Stratix IV QDR II+ SRAM UniPHY 400MHz x18: SIV UniPHY, QDR II+ SRAM 400MHz x18, SIV GX FPGA development kit, Quartus 11.0

• Design Example - Stratix IV DDR3 SDRAM UniPHY 400MHz x8 using Qsys: SIV UniPHY, DDR3 400MHz x8, SIV FPGA development kit, Quartus 11.0
• Design Example - Stratix IV DDR3 SDRAM UniPHY 533MHz x64: SIV UniPHY, DDR3 533MHz x64, SIV GX FPGA development kit, Quartus 11.1
• Design Example - Stratix IV RLDRAM II UniPHY 533MHz x36: SIV UniPHY, RLDRAM II 533MHz x36, SIV E FPFA development kit, Quartus II 11.1
• Design Example - Basic DDR3 UniPHY bring up : SIV, UniPHY, DDR3 533MHz x16, SIV FPGA development kit, Quartus 10.1
• Reference Design : PCI Express to External Memory - Stratix IV ALTMEMPHY DDR3 PCIe Gen1x8 : SIV FPGA development kit, Quartus 9.0
• Design Example - SIV ALTMEMPHY DDR3 400MHz - 3 Shared Controllers : Quartus 8.1
• Design Example - SIV ALTMEMPHY DDR3 400MHz - Four Controllers : Quartus 8.0SP1
• Design Example - SIV ALTMEMPHY DDR3 533MHz x64 - SIVGX Development Kit : Quartus 9.0SP0.03
• Design Example - SIV ALTMEMPHY RLDRAMII 400MHz x18 - Eight Controllers : Quartus 8.1
  

 

Stratix III

• Design Example - SIII ALTMEMPHY RLDRAMII 300MHz x72 : Quartus 8.1
• Design Example - SIII ALTMEMPHY RLDRAMII 300MHz x18- SIO : Quartus 8.1
• Design Example - Stratix III DDR2 SDRAM ALTMEMPHY x72 UDIMM 400MHz: Quartus 9.0
• Design Example - Stratix III DDR2 SDRAM SODIMM ALTMEMPHY 333MHz x64: Quartus II v8.0SP1
• Design Example - Stratix III DDR3 SDRAM ALTMEMPHY 533MHz x72: Quartus II v9.1
• Design Example - Stratix III QDRII SRAM ALTMEMPHY 400MHz x18: Quartus II v8.0
• Design Example - Stratix III DDR2 SDRAM UniPHY 300MHz x72 Quartus II v11.1
• Design Example - Stratix III QDRII SRAM UniPHY 333MHz: Quartus 11.1
• Design Example - Stratix III RLDRAM II UniPHY 400MHz: Quartus 11.1
  

Stratix / Stratix II

• Design Example - Stratix II DDR2 SDRAM ALTMEMPHY 333MHz x72: Quartus II 7.2
• Design Example - Stratix II ALTMEMPHY DDR2 267MHz - Three Controllers: Quartus 9.0
• Design Example - Stratix II GX DDR2 SDRAM LEGACY PHY 267MHz x72: Quartus II 7.2
• Design Example - Stratix II DDR2 SDRAM ALTMEMPHY 200MHz x8 - Native Interface: Quartus 9.1

 

Arria II

• Design Example - Arria II GX DDR2 SDRAM ALTMEMPHY 267MHz x64: Quartus II v9.1
• Design Example - Arria II GX DDR3 SDRAM ALTMEMPHY 300MHz x16: Quartus II v9.1
  

Arria I

 

Cyclone IV

 

Cyclone III

• Design Example - CIII ALTMEMPHY DDR2 150MHz x8 - SOPC Builder : Quartus 9.1
• Design Example - Cyclone III DDR2 SDRAM ALTMEMPHY 167MHz x32: Quartus 7.2
  

 

Cyclone / Cyclone II

 

Designs by Memory Type

DDR3

• Design Example - Stratix IV DDR3 SDRAM UniPHY 400MHz x8 using Qsys : SIV UniPHY, DDR3 400MHz x8, SIV FPGA development kit, Quartus 11.0
• Design Example - Stratix IV DDR3 SDRAM UniPHY 533MHz x64: SIV UniPHY, DDR3 533MHz x64, SIV GX FPGA development kit, Quartus 11.1
• Design Example - Basic DDR3 UniPHY bring up : SIV UniPHY, DDR3 533MHz x16, SIV FPGA development kit, Quartus 10.1
• Reference Design : PCI Express to External Memory - Stratix IV ALTMEMPHY DDR3 PCIe Gen1x8
• Design Example - SIV ALTMEMPHY DDR3 400MHz - 3 Shared Controllers : Quartus 8.1
• Design Example - SIV ALTMEMPHY DDR3 400MHz - Four Controllers : Quartus 8.0SP1
• Design Example - SIV ALTMEMPHY DDR3 533MHz x64 - SIVGX Development Kit : Quartus 9.0SP0.03
• Design Example - Stratix III DDR3 SDRAM ALTMEMPHY 533MHz x72: Quartus II v9.1
• Design Example - Arria II GX DDR3 SDRAM ALTMEMPHY 300MHz x16: Quartus II v9.1

DDR2

• Design Example - Arria II GX DDR2 SDRAM ALTMEMPHY 267MHz x64: Quartus II v9.1
• Design Example - CIII ALTMEMPHY DDR2 150MHz x8 - SOPC Builder : Quartus 9.1
• Design Example - Stratix III DDR2 SDRAM ALTMEMPHY x72 UDIMM 400MHz: Quartus 9.0
• Design Example - Stratix II DDR2 SDRAM ALTMEMPHY 333MHz x72: Quartus 7.2
• Design Example - Cyclone III DDR2 SDRAM ALTMEMPHY 167MHz x32: Quartus 7.2
• Design Example - Stratix II ALTMEMPHY DDR2 267MHz - Three Controllers: Quartus 9.0
• Design Example - Stratix II GX DDR2 SDRAM LEGACY PHY 267MHz x72: Quartus II 7.2
• Design Example - Stratix II DDR2 SDRAM ALTMEMPHY 200MHz x8 - Native Interface: Quartus 9.1
• Design Example - Stratix III DDR2 SDRAM SODIMM ALTMEMPHY 333MHz x64: Quartus II v8.0SP1
• Design Example - Stratix III DDR2 SDRAM UniPHY 300MHz x72 Quartus II v11.1
   

DDR

 

QDR / QDRII / QDRII+

• Design Example - Stratix IV QDR II+ SRAM UniPHY 400MHz x18: SIV UniPHY, QDR II+ SRAM 400MHz x18, SIV GX FPGA development kit, Quartus 11.0
• Design Example - Stratix III QDRII SRAM UniPHY 400MHz: Quartus 11.1
• Design Example - Stratix III QDRII SRAM ALTMEMPHY 400MHz x18: Quartus II v8.0
  

 

RLDRAM / RLDRAMII

• Design Example - SIV ALTMEMPHY RLDRAMII 400MHz x18 - Eight Controllers : Quartus 8.1
• Design Example - SIII ALTMEMPHY RLDRAMII 300MHz x72 : Quartus 8.1
• Design Example - SIII ALTMEMPHY RLDRAMII 300MHz x18- SIO : Quartus 8.1
• Design Example - Stratix III RLDRAM II UniPHY 400MHz: Quartus 10.0
• Design Example - Stratix IV RLDRAM II UniPHY 533MHz x36: SIV UniPHY, RLDRAM II 533MHz x36, SIV E FPFA development kit, Quartus II 11.0
  

 

See Also

•   Guidelines - Multiple Memory interface Using ALTMEMPHY

 

External Links

1. Altera's External Memory Interface Solutions Center
2. Altera's External Memory Interface Handbook

 

Key Words

UniPHY, HPCII, HPCI, HPC, High Performance Controller, AltMemPHY, DDR3, DDR2, DDR, QDR, QDRII, QDRII+, RLDRAM, RLDRAMII, Reference Design, Design Example, External Memory, EMI, EMIF, Qsys

 

 

 
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